The term “net” as used herein refers to an electrical connection between components of a user's circuit design. For example, one net may connect the output terminal of an AND gate to the input terminal of another AND gate and to the input terminal of a flip flop. An AND gate is one component type, and a flip flop is another component type. An “instance” is a single occurrence of a component type. A net connects to a particular pin on a component instance. For example, a clock net is connected to a specific clock pin on a flip-flop component instance. In the context of FPGAs, a pin of a component instance may correspond to the input port of a configurable logic block (CLB), for example. A “netlist” is a list of all the nets which connect the component instances of a user's design and the pins on component instances connected by each net.
The circuit design process generally includes the steps of design entry, synthesis, optimization, device mapping, and place-and-route, along with functional and timing simulations to verify correctness. Determining the feasibility of routing a set of nets given certain constraints may be desirable in several situations in the context of this process. Three examples are provided below. In one example involving a given set of nets, it would be useful for a user to know whether there exists a routing solution for the set of nets such that no two nets are electrically shorted in the solution. If no solution exists, the nets may be restructured prior to place-and-route.
In another example, a user may need to know the feasibility of routing a set of nets given certain timing constraints. Typically, only a subset of the list of all nets are considered to be “timing-critical” nets. For these timing-critical nets, it would be useful to know whether there exists a routing solution that satisfies the timing constraints. It would be desirable if this determination could be made quickly and prior to routing the set of all nets.
In the third example a small change is made to a design. Since the user will not want to disrupt other unchanged and validated sections of the design, it would be useful to determine whether there exists a routing solution for the nets which does not impact the unmodified sections of the design.
An apparatus that addresses the aforementioned problems, as well as other related problems, is therefore desirable.